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| memsic m mc3316xm t rev.a page 1 of 13 8 / 10 /2012 16 gauss 3 - axis magnetic sensor, with i 2 c interface mmc 3316 xm t features ? full y integrat ed 3 - axis magnetic sensor and electronic circuits requiring fewer external components ? super ior dynamic range and accuracy: ? 16g fsr with 14bit operation ? 2 mg/lsb resolution ? 2 mg rms noise ? enables heading accuracy <1o ? small , low profile package 2 .0x 2 .0x 1. 0 mm ? set/reset function clears the sensors of residual magnetization resulting from strong ext ernal fields ? low power consumption (100a @ 7 hz) ? 1 a (max) p ower down function ? i 2 c slave, fast ( 400 khz) mode ? 1. 62 v~3.6v wide power supply operation supported , 1.8v i/o compatibility . ? rohs compliant applications : electronic compass & gps navigation position sensing functional block diagram description : the mm c 3316 xm t is a complete 3 - axis magnetic sensor with on - chip signal processing and integrated i 2 c bus . t he device can be connected directly to a microproce ssor , eliminating the need for a/d converters or timing resources. it can measure magnetic field s with in the full scale range of ? 1 6 gauss , with 2 mg/lsb resolution and 2mg rms noise, enabling hea ding accuracies of <1 degree in electronic compass applicat ions . contact memsic for access to advanced calibration and tilt - compensation algorithms. information furnished by memsic is believed to be accurate and reliable. however, no responsibility is assumed by memsic for its use, or for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of memsic. in addition, an integrated set/reset function enables the sensors to be cleared of any residual magnetic polarization resulting from exposure to strong externa l magnets . the set/reset function can be performed prior to each measurement, or periodically if desired, to maintain a stable sensor offset over time. the mmc 3316 xm t is packaged in a small low profile l ga package ( 2 .0 x 2 .0 x 1. 0 mm , ) and with an operating temperature rang from - 40 ? c to +85 ? c . the mmc 3316 xm t provides an i 2 c digital output with 400 khz , fast mode operation. ? memsic, inc. one technology drive, suite 325, andover, ma0 1810, usa tel: +1 978 738 0900 fax: +1 978 738 0196 www.memsic. co m signal path x signal path y bridge regulator bridge bias bandgap reference adc reference generator timing generation magnetize controller fuses, control logic, factory interface i 2 c interface measured data x - axis sensor y - axis sensor signal path z z - axis sensor
memsic m mc3316xm t rev.a page 2 of 13 8 / 10 /2012 specification s : (measurements @ 25 ? c, unless otherwise noted; v da = v d d = 1.8 v unless otherwise specified) parameter conditions min typ max units field range (each axis) total ap plied field ? 1 6 gauss supply voltage v da 1.62 1 1.8 3.6 v v d d (i 2 c interface) 1.62 1 1.8 3.6 v supply current 2 7 measurements/second 0. 06 0. 10 0.16 ma power down current 0.01 1 .0 a operating temperature - 40 85 ? c storage temperature - 55 1 25 ? c linearity error (best fit straight line) 1 6 gauss 1.0 %fs hysteresis 3 sweeps across 16 gauss 0. 5 %fs repeatability error 3 sweeps across 16 gauss 0. 5 %fs alignment error ? 1.0 ? 3.0 degrees transverse sensitivity ? 2.0 ? 5 .0 % total rms noise 1~25hz, rms 2 .0 mgauss output resolution 14 bits heading accuracy 3 ? 0.5 ? 1 .0 degrees bandwidth 25 hz sensitivity ? 16 gauss - 1 0 + 1 0 % ? 16 gauss 460 512 564 counts/gauss sensitivity change over temperature - 40~85 ? c ? 16 gauss ? 1100 ppm/ ? c null field output ? 16 gauss - 0.2 +0.2 gauss 8090 8192 8294 counts null field output change over temperature 4 delta from 25 ? c ? 16 gauss ? 0 .4 mgauss/ ? c disturbing field 2 5 gauss maximum exposed field 10000 gauss note: 1 : 1.62 v is the m i nimum operation voltage, or v da / v d d should not be lower than 1.62 v. 2 : power consumption is proportio nal to how many measurements performed per second, for example, at one measurement per second, t he power consumption will be 0.1ma/7 =0.014ma. 3 : memsic product is with low noise and enables users to utilize heading accuracy to be 0.5 degree typical and 1.0degree maximum when using memsic?s proprietary software or algorithm 4. the erro r can be eliminated by using s et and reset to deter mine the true null field output for each measurement. memsic m mc3316xm t rev.a page 3 of 13 8 / 10 /2012 i 2 c interface i/o characteristics (v dd = 1.8 v) parameter symbol test condition min. typ. max. unit logic input low level v il - 0.5 0.3 * v dd v logic input high level v ih 0.7*v dd v dd v hysteresis of schmitt input v hys 0.2 v logic output low level v ol 0.4 v input leakage current i i 0.1v dd memsic m mc3316xm t rev.a page 5 of 13 8 / 10 /2012 pin descriptions: v da C this is the supply input for the circuits and the magnetic sensor . the dc voltage should be between 1.62 and 3.6 volts. a 1uf by - pass capacitor is strongly recommended . vsa C this is the ground pin for the magnetic sens or . sd a C this pin is the i 2 c serial data line, and operate s in fast (400 khz) mode . scl C this pin is the i 2 c serial clock line, and operate s in fast (400 khz) mode. v dd C this is the power supply input for the i 2 c bus, and is 1.8v compatible can be 1. 62v to 3.6v. test C factory use only, leave o pen /no connect ion . c ap C connect a 4.7 uf low esr (typically smaller than 0.2ohm) ceramic capacitor . vpp C factory use only, leave open c+, c - C short together . external capacitor connection (top view) power consumption the memsic magnetic sensor consumes 0. 1 ma (typical) at 1.8 v with 7 measurements/second, but the current is proportional to the number of measurements carried out, for example, if only 2 measurements /second are p e rformed, the current will be 0 . 1 *2/ 7 =0. 0 28 ma. i 2 c interface description a slave mode i 2 c circuit has been implemented into the memsic magnetic sensor as a standard interface for customer applications. the a/d converter and mcu functionality have been ad ded to the memsic sensor, thereby increasing ease - of - use, and lowering power consumption, footprint and total solution cost. the i 2 c (or inter ic bus) is an industry standard bi - directional two - wire interface bus. a master i 2 c device can operate read/wr ite controls to an unlimited numb er of devices by device addressing. the memsic magnetic sensor operates only in a slave mode, i.e. only responding to calls by a master device . i 2 c bus characteristics i 2 c bus the two wires in the i 2 c bus are called sda (serial data line) and scl (serial clock line). in order for a data transfer to start, the bus has to be free, which is defined by both wires in a high output state. due to the open - drain/pull - up resistor structure and wire d boolean a nd operation, any device on the bus can pull lines low and overwrite a high signal. the data on the sda line has to be stable during the high period of the scl line. in other words, valid data can only change when the scl line is low. note: rp selecti on guide: 4.7kohm for a short i 2 c bus length (less than 4inches), and 10kohm for a bus length less than 2inches . rp rp sda (serial data line) scl (serial clock line) device 1 device 2 vdd 1.0 uf power ii power i 4.7 uf 10 uf cap c - c+ test vpp scl vdd sda vsa vda memsic m mc3316xm t rev.a page 6 of 13 8 / 10 /2012 register: register name address description xout low 0 0 h xout lsb xout high 0 1 h xout msb yout low 0 2 h yout lsb yout high 0 3 h yout msb zo ut low 0 4 h zout lsb zout high 0 5 h zout msb status 06h device status internal control 0 07h control register 0 internal control 1 08h control register 1 product id 0 10 h product id r 0 1 c h factory used register r 1 1 d h factory used register r 2 1 e h f actory used register r 3 1 f h factory used register product id 1 20 h product id register details: xout high, xout low xout low 7 6 5 4 3 2 1 0 addr: 00h xout[ 7 : 0 ] reset value xout[ 7 : 0 ] mode r xout high 7 6 5 4 3 2 1 0 addr: 01h reserved xout[ 13 : 8 ] reset value 2 ? h0 xout[13:8] mode r 14bits x - axis output, unsigned format. yout high, yout low y out low 7 6 5 4 3 2 1 0 addr: 0 2 h y out[ 7 : 0 ] reset value y out[ 7 : 0 ] mode r y out high 7 6 5 4 3 2 1 0 addr: 03 h reserved y out[ 13 : 8 ] reset value 2 ? h 0 yout[13:8] mode r 14bits y - axis output, 2?s unsigned format. memsic m mc3316xm t rev.a page 7 of 13 8 / 10 /2012 zout high, zout low z out low 7 6 5 4 3 2 1 0 addr: 0 4 h z out[ 7 : 0 ] reset value z out[ 7 : 0 ] mode r z out high 7 6 5 4 3 2 1 0 addr: 0 5 h reserved z out[ 13 : 8 ] reset value 2 ? h0 zout[13 :8] mode r 14bits z - axis output, unsigned format. status : device status 7 6 5 4 3 2 1 0 addr: 06h reserved nvm_rd d one pump on meas done reset value 5?h0 0 0 0 mode r bit name description meas done indicates measurement event is completed . this bit should be checked before reading the output pump on indicates the charge pump status nvw_rd done indicates the chip was able to successfully read its memory. interna l control 0 : control register 0 7 6 5 4 3 2 1 0 addr: 07h reserved r eset set n o boost cm freq1 cm freq0 cont mode on tm reset value 0 0 0 0 0 0 0 0 mode w w w w w w w w bit name description tm take measurement, set ?1? will writing 1 will reset the mr by passing a large current through set/reset coil at a reversed direction set writing 1 will set the mr by passing a large current through set/reset coil memsic m mc3316xm t rev.a page 8 of 13 8 / 10 /2012 internal control 1 : control register 1 7 6 5 4 3 2 1 0 addr: 08h reserved filt time sel1 filt time sel0 res sel1 res sel0 fsr1 fsr0 reset value 2?h0 0 0 0 0 0 0 mode w w w w w w w w bit name description fsr0 factory - use register fsr1 res sel0 factory - us e register res sel1 filt time sel0 factory - use register filt time sel1 r0, r1, r2, r3 r0 7 6 5 4 3 2 1 0 addr: 1 c h factory - use register reset value factory - use register mode r r1 7 6 5 4 3 2 1 0 addr: 1 d h factory - use register reset value fac tory - use register mode r r2 7 6 5 4 3 2 1 0 addr: 1 e h factory - use register reset value factory - use register mode r r3 7 6 5 4 3 2 1 0 addr: 1 f h factory - use register reset value factory - use register mode r product id 0 : product id 0 7 6 5 4 3 2 1 0 addr: 10h product id0[2:0 ] factory - use register reset value x x x factory - use register mode r r r r r r r r xxx: i 2 c address code. product id 1 : product id 1 7 6 5 4 3 2 1 0 addr: 2 0 h product id 1 [ 7 : 0 ] reset value 0 0 0 0 0 1 0 1 mode r r r r r r r r memsic m mc3316xm t rev.a page 9 of 13 8 / 10 /2012 data transfer a data transfer is started with a start condition and ended with a stop condition. a start condition is defined by a high to low transition on the sda line while scl line is high. a stop condition is def ined by a low to high transition on the sda line while the scl line is held high. all data transfer in i 2 c system are 8 - bits long. each byte has to be followed by an acknowledge bit. each data transfer involves a total of 9 clock cycles. data is transferre d starting with the most significant bit (msb). after a start condition, the master device calls a specific slave device, in our case, a memsic device with a 7 - bit device address [ 0110xxx ] . to avoid potential address conflict s , either by ics from other m anufacturers or by other memsic device s on the same bus, a total of 8 different addresses can be pre - programmed into memsic device by the factory. following the 7 - bit address, the 8 th bit determines the direction of data transfer: [1] for read and [0] for write. after being addressed, the memsic device should respond with an acknowledge signal, which pulls the sda line low. in order to read the sensor signal, a master device should initiate a write action with a code of [xxxxxxx1] into the memsic device ?s 8 - bit internal control register 0 . note that this action also serves as a wake - up call . after writing the code [xxx x xxx 1 ] into internal control 0 , and the bit 0 tm (status register, bit 0) is ?1?, also a read command is received, the memsic device being called transfers 8 - bit data to i 2 c bus. power state memsic mr sensor will enter power down mode automatically after data acquisition is finished. vda vdd power state off(0v) off(0v) off(0v), no power consumption off(0v) 1.62~3.6v off(0v), power consumption is less than 1ua. 1.62~3.6v off(0v) power consumption is not predictable, not recommended state. 1.62~3.6v 1.62~3.6v normal operation mode, device will enter into power down mode automatically after data acquisition is finished exampl e measurement first cycle: a start condition is established by the master device followed by a call to the slave address [ 0110xxx ] with the eighth bit held low to indicate a write request . note: [x x x] is determined by factory programming and a total of 8 different addresses are available. second cycle: after a n acknowledge signal is received by master device ( memsic device pulls sda line low during 9 th scl pulse) , the master device sends the address of control register 0 or [000 0 0111 ] as the target regis ter to be written. the memsic device should acknowledge at the end (9 th scl pulse , scl pulled low ). third cycle: the m aster device writes to the internal control register 0 th e code [000000 0 1 ] as a wake - up call to initiate a data acquisition. the memsic device should send an a cknowledge. a stop condition indicates the end of the write operation. fourth cycle: the master device sends a start command followed by the memsic device ?s seven bit address , and finally the eighth bit set low to indicate a write . a n a cknowledge should be send by the memsic device in response . fifth cycle: the master device sends the memsic device ?s status register [000001 1 0 ] as the address to read . sixth cycle: the master device sends a start command followed by the memsic dev ice ?s seven bit address , and finally the eighth bit set high to indicate a read. a n a cknowledge should be send by the memsic device in response . seven th cycle: the master device cycles the scl line. this causes the status register data to ap pear on sda l ine. continuous ly read the status register until the meas done bit is set to ?1? . eighth cycle: the master device sends a start command followed by the memsic device ?s seven bit address , and finally the eighth bit set low to indicate a write . a n a cknowled ge should be send by the memsic device in response. ninth cycle: the master device sends a [000000 0 0] (xout lsb register address) as the register address to read . tenth cycle: the master device calls the memsic device ?s address with a read (8 th scl cycl e sda line high). a n a cknowledge should be send by the memsic device in response. memsic m mc3316xm t rev.a page 10 of 13 8 / 10 /2012 eleventh cycle: master device continues to cycle the scl line, and each consecutive byte of data from the x, y and z registers should appear on the sda line. the internal me mory address pointer automatically moves to the next byte. the master device acknowledges each . thus: eleventh cycle: lsb of x channel . twelfth cycle: m sb of x channel . t hirteenth cycle: l sb of y channel . fourteenth cycle: m sb of y channel . fifteent h cycle: l sb of z channel. sixteenth cycle: m sb of z channel . master ends communications by not sending an ? a cknowledge ? and also follows with a ? stop ? command. example of set/reset first cycle: a start condition is established by the master device fol lowed by a call to the slave address [0110xxx ] with the eighth bit held low to indicate a write request . note: [x x x] is determined by factory programming and a total of 8 different addresses are available. second cycle: after a n acknowledge signal is re ceived by the master device ( the memsic device pulls the sda line low during the 9 th scl pulse), the master device sends [00000111 ] as the t arget address (internal control register 0 ) . the memsic device should acknowledge at the end (9 th scl pulse) . thir d cycle: the master device writes to the memsic device ?s internal control register the code [ 0 0 0 0000 1 ] to prepare for set action.* a minim um of 50m s wait should be provided to allow the memsic device to finish its preparation for the set action . * forth c ycle: the master device writes to the memsic device ?s internal control 0 register the code [0 01 0000 0] as a wake - up call to initiate a set a ction . memsic device should send an a cknowledge. fifth cycle: the master device writes to the memsic device?s intern al control 0 register the code [0 00 00000] to stop the set a ction . memsic device should send an a cknowledge. a minim um of 50m s wait should be provided to allow the memsic device to finish its preparation for reset action . * * six th cycle: master device writ es to the memsic device ?s internal control 0 register the code [0 10 0000 0] as a wake - up call to initiate a reset a ction . the memsic device should send an a cknowledge. ** seventh cycle: the master device writes to the memsic device?s internal control 0 regis ter the code [0 00 00000] to stop the reset a ction . memsic device should send an a cknowledge. a minim um of 50us wait should be given to memsic device to finish reset action before t aking a measurement. eigh th cycle: master device writes to internal memsic device memory the code [0 00 0000 1 ] to start a take measurement. note *: the set preparation action is only required when the part is inactive for a long time (typically >5secends). note **: the reset action can be skipped for most of the applications u sing set/reset to calibrate null field output the integrated set and reset functions of the MMC3316XMT enables the user to remove error associated with offset change as a function of temperature, thereby enabling more precise heading measurements over a w ider temperature than competitive technologies. the functions effectively flip the magnetic sensing polarity of the sensing elements of the device. in its simplest form the procedure and calculation are: 1) perform set/measure (output1 = h + offset) 2) perform r eset/measure (output2 = - h + offset) 3) calculate h by subtracting the two measurements and divide by 2 where h is the applied magnetic field and offset is the null field output. time between the set/measure and reset/measure operation needs to be kept as sho rt as possible to minimize error induced by the applied magnetic field changing between the two operations. memsic m mc3316xm t rev.a page 11 of 13 8 / 10 /2012 operating timing o perating timing diagram parameter symbol min. typ. max. unit time to operate device a fter vdd valid t op 20 s w ait time from power on to rm /rrm command t fm 10 0 ms t ime to finish 1 st magnetization t m 1 50 m s time to finish 2 nd magnetization t m 2 50 ms t ime to measure magnetic field t tm 1 0 ms vdd m t r t r t r m t r t fm t op i 2 c t m t tm t m t tm t tm t tm m t r m agnetize take measurement read data r e peat t & r w ait the device ready for next operation memsic m mc3316xm t rev.a page 12 of 13 8 / 10 /2012 storage conditions temperature: <30 humidity: <60%rh period: 1 year (after delivery) moisture sensitivity level: 3 bake prior to reflow: storage period more than 1 year, or humidity indicator card reads >60% at 235 bake procedure: refer to j - std - 033 bake to soldering: <1 week un der 30 /60%rh condition s oldering recommendations memsic magnetic sensor is capable of withstanding an msl 3 / 260 solder reflow. following is the reflow profile: note: ? reflow is limited by 2 times ? the second reflow cycle should be applied after device has cooled down to 25 (room temperature) ? this is the reflow profile for pb free process ? the peak temperature on the sensor surface should be limited under 260 for 10 seconds. ? s older paste?s reflow recommendation can be fol lowed to get the best smt quality. if the part is mounted manually, please ensure the temperature could not exceed 260 for 10 seconds. max gradient 2.8 /s 260 peak temperature for 10s 100 260max 195 180 180 50 package surface temp( ) time(s) 300 350 400 450 250 200 150 100 50 0 300 250 200 150 100 50 0 slope 2/s max memsic m mc3316xm t rev.a page 13 of 13 8 / 10 /2012 package drawing ( lg a package) land pattern 10x0.3 0.05 10x0.26 0.05 2.0 0.1 3x0.52 1.56 0.05 2.0 0.1 1.52 0.05 scl vdd cap c- test vda vpp z+ x+ y+ 1 0.05 (bottom view) (top view) pin 1 marking (side view) 502 xxx 1 2 3 5 4 c+ vsa sda 6 7 8 10 9 10x0.35 0.05 10x0.3 0.05 2.0 0.1 3x0.52 1.56 0.05 2.0 0.1 scl vdd cap c- c+ vsa sda vpp vda test 1.52 0.05 |
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